The invention relates to a relaxation oscillator including stages each having a capacitor and means for charging the capacitor as soon as the voltage of the capacitor of another stage passes a first threshold voltage.
Such a relaxation oscillator is known inter alia from an article published in IEEE Journal of Solid State Circuits, Vol. 27, No. 7, July, 1992, pp. 982-987, particularly from FIG. 4 of this article. This article describes a two-stage relaxation oscillator in which the charging of the one stage is started when the voltage of the other stage passes a threshold voltage. Once the one capacitor is charged the other capacitor is discharged. Charging is effected with a constant current whose magnitude is adjustable. Discharging is effected by means of a discharge switch in such a short time that the period of one cycle and, consequently, the frequency of the relaxation oscillator is determined solely by the sum of the charging times of the two capacitors. By making the charging currents adjustable by means of a control signal, for example a control current or a control voltage, the frequency of the oscillator can be varied. This makes such an oscillator suitable for use as a voltage-controlled oscillator (VCO) or current-controlled oscillator (CCO) in phase-locked loops (PLL) and as a frequency modulator or demodulator. These applications require a high linearity and a low phase jitter. The linearity defines the relationship between the oscillation frequency and the magnitude of the control signal. Detection whether the threshold voltage is reached is effected by means of a decision circuit, usually a comparator or a Schmitt trigger, which compares the instantaneous voltage on the capacitor to be charged with a threshold voltage. Such a decision circuit has an internal inertia, as a result of which a certain delay T.sub.d occurs until the threshold voltage detection takes effect. The effect of this delay increases comparatively as the oscillation frequency increases. The result is that the oscillation frequency no longer increases proportionally as the control signal increases. For high frequencies the linearity deteriorates. Reducing the delay T.sub.d, i.e. choosing a faster decision circuit, improves the high-frequency linearity but at the same time it causes the noise bandwidth of the equivalent input noise of the decision circuit to increase. The equivalent input noise of the decision circuit may be assumed to be superimposed on the threshold voltage. As a consequence, the threshold voltage fluctuates and charging of the capacitors each time starts at another instant. As the decision circuit is faster the bandwidth of its equivalent input noise becomes larger and the input noise is also sampled with a larger bandwidth by the decision circuit. This results in an increasing phase noise or jitter as the delay of the decision circuit decreases. Therefore, it is difficult to construct a relaxation oscillator having a high linearity as well as a low phase noise.